tsu_peer_tx_msb_sec (GEM) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

tsu_peer_tx_msb_sec (GEM) Register Description

Register Nametsu_peer_tx_msb_sec
Offset Address0x00000000F0
Absolute Address 0x00FF0B00F0 (GEM0)
0x00FF0C00F0 (GEM1)
0x00FF0D00F0 (GEM2)
0x00FF0E00F0 (GEM3)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionPTP Peer Event Frame Transmitted Seconds Register 47:32

tsu_peer_tx_msb_sec (GEM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:16roRead-only0x0Reserved, read as 0, ignored on write.
timer_seconds15:0roRead-only0x0PTP Peer Event Frame TX Seconds. The register is updated with the value that the 1588 timer seconds register held when the SFD of a PTP transmit peer event crosses the MII interface. The actual update occurs when the GEM recognizes the frame as a PTP pdealy_req or pdelay_resp frame. An interrupt is issued when the register is updated.