tsu_ptp_rx_nsec (GEM) Register Description
| Register Name | tsu_ptp_rx_nsec |
|---|---|
| Offset Address | 0x00000001EC |
| Absolute Address |
0x00FF0B01EC (GEM0) 0x00FF0C01EC (GEM1) 0x00FF0D01EC (GEM2) 0x00FF0E01EC (GEM3) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | PTP Event Frame Received Nanoseconds Register |
tsu_ptp_rx_nsec (GEM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:30 | roRead-only | 0x0 | Reserved, read as 0, ignored on write. |
| timer | 29:0 | roRead-only | 0x0 | PTP Event Frame Received Nanoseconds. The register is updated with the value that the 1588 timer nanoseconds register held when the SFD of a PTP receive primary event crosses the MII interface. The actual update occurs when the GEM recognizes the frame as a PTP sync or delay_req frame. An interrupt is issued when the register is updated. |