tsu_ptp_rx_sec (GEM) Register Description
| Register Name | tsu_ptp_rx_sec |
|---|---|
| Offset Address | 0x00000001E8 |
| Absolute Address |
0x00FF0B01E8 (GEM0) 0x00FF0C01E8 (GEM1) 0x00FF0D01E8 (GEM2) 0x00FF0E01E8 (GEM3) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | PTP Event Frame Received Seconds Register 31:0 |
tsu_ptp_rx_sec (GEM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| timer | 31:0 | roRead-only | 0x0 | PTP Event Frame Received Seconds. The register is updated with the value that the 1588 timer seconds register held when the SFD of a PTP receive primary event crosses the MII interface. The actual update occurs when the GEM recognizes the frame as a PTP sync or delay_req frame. An interrupt is issued when the register is updated. |