tsu_ptp_tx_nsec (GEM) Register Description
| Register Name | tsu_ptp_tx_nsec |
|---|---|
| Offset Address | 0x00000001E4 |
| Absolute Address |
0x00FF0B01E4 (GEM0) 0x00FF0C01E4 (GEM1) 0x00FF0D01E4 (GEM2) 0x00FF0E01E4 (GEM3) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | PTP Event Frame Transmitted Nanoseconds Register |
tsu_ptp_tx_nsec (GEM) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:30 | roRead-only | 0x0 | Reserved, read as 0, ignored on write. |
| timer | 29:0 | roRead-only | 0x0 | PTP Event Frame Transmitted Nanoseconds. The register is updated with the value that the 1588 timer nanoseconds register held when the SFD of a PTP transmit primary event crosses the MII interface. The actual update occurs when the GEM recognizes the frame as a PTP sync or delay_req frame. An interrupt is issued when the register is updated. |