tsu_strobe_msb_sec (GEM) Register

Zynq UltraScale+ Devices Register Reference (UG1087)

Document ID
UG1087
Release Date
2024-03-13
Revision
1.10

tsu_strobe_msb_sec (GEM) Register Description

Register Nametsu_strobe_msb_sec
Offset Address0x00000001C4
Absolute Address 0x00FF0B01C4 (GEM0)
0x00FF0C01C4 (GEM1)
0x00FF0D01C4 (GEM2)
0x00FF0E01C4 (GEM3)
Width32
TyperoRead-only
Reset Value0x00000000
Description1588 Timer Sync Strobe Seconds Register 47:32

tsu_strobe_msb_sec (GEM) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:16roRead-only0x0Reserved, read as 0, ignored on write.
strobe15:0roRead-only0x01588 Timer Sync Strobe Seconds. The most significant 16-bit value of the Timer Seconds register captured when gem_tsu_ms and gem_tsu_inc_ctrl are zero.