The K26 SOM and
K24 SOM are equipped with
adequate decoupling capacitors on all PS and PL voltage rails to support a defined
set of transient step loads. The programmable logic (PL) and processing system (PS)
designs must not exceed the specified maximum current limit and the corresponding
step loads as listed in the following tables.
Table 1. PL Design Limits for K26 SOM
| Voltage Rail |
Voltage (V) |
Maximum Current (A) |
Step Load (% of Maximum Current) |
| VCCINT
|
0.72 |
6.5 |
50 |
| VCCINT_VCU
|
0.9 |
3.5 |
50 |
Table 2. PS Design Limits for K26 SOM
| Voltage Rail |
Voltage (V) |
Maximum Current (A) |
Step Load (% of Maximum Current) |
| VCC_PSINTLP and VCC_PSINTFP
|
0.85 |
3.5 |
25 |
| VCCO_PSIO
|
1.8 |
0.300 |
100 |
Table 3. PL Design Limits for K24 SOM
| Voltage Rail |
Voltage (V) |
Maximum Current (A) |
Step Load (% of Maximum Current) |
| VCCINT
|
0.72 |
3.13 |
100 |
| VCCINT_IO
|
0.85 |
0.08 |
40 |
Table 4. PS Design Limits for K24 SOM
| Voltage Rail |
Voltage (V) |
Maximum Current (A) |
Step Load (% of Maximum Current) |
| VCC_PSINTLP and VCC_PSINTFP
|
0.85 |
2.27 |
25 |
| VCCO_PSIO
|
1.8 |
0.29 |
100 |