The following figures show an example layout showing the BGA routing breakout areas of a 0.5 mm pitch Xilinx® device. The footprint is for a UBVA530 “InFO” device.
Figure 1. Top Layer Breakout (0.5 mm), One Route between BGA Balls
Figure 2. First Inner Signal Breakout (0.5 mm), One Route between BGA Balls
Figure 3. Second Inner Signal Breakout (0.5mm), One Route between BGA
Balls
