Conditional Rights Qualifiers - 2023.2 English

Vivado Design Suite User Guide: Creating and Packaging Custom IP (UG1118)

Document ID
UG1118
Release Date
2023-11-06
Version
2023.2 English

The IEEE 1735-2014 V2 standard defines activity as a conditional keyword. However, AMD does not support this keyword, and instead uses xilinx_activity as a conditional keyword.

Important: Other conditional keywords defined by IEEE 1735-2014 standard are not supported by AMD.

The xilinx_activity keyword breaks down the tool flow into abstract activities that align with the specific activities supported by the Vivado Design Suite.

The following table lists the supported values for the xilinx_activity keyword.

Table 1. xilinx_activity Condition Keywords
Value Definition
simulation The abstract activity that applies to tools that provide execution semantics. For Vivado simulator, this would refer to simulation at any stage of the tool chain.
synthesis The abstract activity that applies to tools that transform the IP into another symbolic form. In the Vivado tool flow, this equates to Vivado synthesis.
implementation The abstract activity that applies to tools that does place and route of the netlist on FPGA resources. In Vivado, this equals Vivado Implementation phase.