DMA Features
Xilinx® provides a high-performance platform configuration to design custom acceleration applications with XDMA, providing:
- Memory-mapped DMA transfer
- High-bandwidth transfers
- Kernel support for memory-mapped AXI4
| Feature | XDMA |
|---|---|
| Host interface | Gen3 x16 w/ 512-bit data path |
| Data path | 512-bit wide memory-mapped AXI4 |
| DMA transactions | Memory-mapped transfers between on card DDR4/HBM/PLRAM memories |
| Maximum transfer size | 256 MB |
| DDR4 channels | U200/U250: 4x DDR4 16 GB (64 GB maximum) U280: 2x DDR4 16 GB (32 GB maximum) |
| HBM | U50/U50LV/U280: 1x HBM 8 GB U55C: 1x HBM 16 GB |