AMD Alveo™ Data Center accelerator cards are PCI Express® compliant cards designed to accelerate compute-intensive applications such as machine learning, data analytics, and video processing in a server or workstation. The AMD Vitis™ core development kit provides verified platforms defining all the required hardware and software interfaces (shown in gray in the following figure), allowing you to design custom acceleration applications (shown in white) that are easily integrated into the Vitis programming model.
On the AMD device, a platform consists of a static region and a dynamic region. The static region of the platform provides the basic infrastructure for the card to communicate with the host and hardware support for the kernel. It includes the following features:
- Host Interface (HIF)
- PCIe endpoint to enable communication with external PCIe host.
- Direct Memory Access (DMA)
- XDMA IP and AXI Protocol Firewall IP.
- Clock, Reset, and Isolation (CRI)
- Basic clocking and reset for card bring-up and operation. Reset and Dynamic Function eXchange isolation structure are required for isolation during partial bitstream download.
- Card Management Peripheral (CMP)
- Peripherals responsible for board health and diagnostics, debug, and programming.
- Card Management Controller (CMC)
- UART/I2C communication to satellite controller (MSP432), QSFP, sensors and manages firmware updates from the host (over PCIe).
- Embedded RunTime Scheduler (ERT)
- Schedule and monitor compute units during kernel execution.
Accelerated kernels go into the dynamic region. The features and resources available for accelerated kernels are described in Alveo Platforms.