Platform Features

Alveo Data Center Accelerator Card Platforms User Guide (UG1120)

Document ID
Release Date
1.9 English

Different platform releases can include one or more of the following features. Features use resources in the static region of the platform.

Alveo Platforms lists the features supported by each platform.

Table 1. Feature Types
Feature Description
P2P Shorthand for PCIe® peer-to-peer communication. Enables direct DMA transfer of data between two Alveo Data Center accelerator cards via the PCIe bus without temporarily buffering data within the host DDR memory. Without this feature the host CPU and memory are used for card-to-card communication. For more information, see XRT documentation on PCIe Peer-to-Peer (P2P).
M2M Enabling on-card data transfers between card memory resources. Platforms that do not support this feature only transfer memory through host CPU and memory. For more information, see XRT documentation on Memory-to-Memory (M2M) support.
HM Shorthand for PCIe host memory transfers. The AXI subordinate interface allows the card FPGA to directly read and write to host memory, bypassing the DMA. For more information, see XRT documentation on PCIe host memory.
DFX Dynamic function eXchange (DFX) technology allows the card to change functionality on the fly without power-cycling the server, which enables some platforms to reconfigure DMA links.

Current platforms come in one of two DFX variants.

The PCIe core and the DMA engine are combined and reside in the static region of the platform. These are also known as one stage platforms.
The PCIe core resides in the static region of the FPGA (also known as the base) while the DMA engine is dynamically loaded into a new reconfiguration region used by the shell partition. These are also known as two stage platforms.

For more information, see Alveo Platform Loading Overview in XRT Documentation.

GT Shorthand for Gigabit Transceiver (GT) kernel connection. This platform allows for transceiver connection of user-provided MAC within an RTL-kernel for in-line QSFP networking access.