High-Temperature Operating Life (HTOL) Test

Device Reliability Report (UG116)

Document ID
UG116
Release Date
2023-05-17
Revision
10.17 English

The HTOL test is conducted under the conditions of TJ = 125°C temperature, maximum VDD, and either dynamic or static operation. The FIT calculations in Table 41 through Table 43 are based on the assumption of 0.7 eV activation energy and 60% confidence level.

Summary

Table 1. Summary of HTOL Test Results
Device Lot Quantity Fail Quantity Device Quantity Actual Device Hours at TJ ≥ 125°C Equivalent Device Hours at TJ = 125°C Failure Rate at 60% CL and TJ = 55°C (FIT)
XC2Cxxx/A 12 0 539 1078000 1082919 11
XC95xxxXL 13 0 542 1044000 1137973 10
XCRxxxXL 12 0 538 1008500 1010470 12

Data

Table 2. HTOL Test Results for 180 nm Si Gate CMOS Device Type XC2Cxxx/A
Device Lot Quantity Fail Quantity Device Quantity Actual Device Hours at TJ ≥ 125°C Equivalent Device Hours at TJ = 125°C Failure Rate at 60% CL and TJ = 55°C (FIT)
XC2C128 10 0 449 898,000 902,919 11
XC2C64A 2 0 90 180,000 180,000
XC2Cxxx/A 12 0 539 1,078,000 1,082,919
Table 3. HTOL Test Results for 350 nm/250 nm Si Gate CMOS Device Type XC95xxxXL
Device Lot Quantity Fail Quantity Device Quantity Actual Device Hours at TJ ≥ 125°C Equivalent Device Hours at TJ = 125°C Failure Rate at 60% CL and TJ = 55°C (FIT)
XC95144XL 2 0 87 174,000 305,777 10
XC9572XL 11 0 455 870,000 832,195
XC95xxxXL 13 0 542 1,044,000 1,137,973
Table 4. HTOL Test Results for 350 nm Si Gate CMOS Device Type XCRxxxXL
Device Lot Quantity Fail Quantity Device Quantity Actual Device Hours at TJ ≥ 125°C Equivalent Device Hours at TJ = 125°C Failure Rate at 60% CL and TJ = 55°C (FIT)
XCR3064XL 1 0 45 22,500 22,738 12
XCR3128XL 3 0 135 270,000 270,630
XCR3256XL 4 0 176 352,000 352,744
XCR3384XL 3 0 134 268,000 268,358
XCR3512XL 1 0 48 96,000 96,000
XCRxxxXL 12 0 538 1,008,500 1,010,470