Driver Architecture - 2023.1 English

Zynq UltraScale+ MPSoC ZCU106 Video Codec Unit Targeted Reference Design User Guide (UG1250)

Document ID
UG1250
Release Date
2023-05-16
Version
2023.1 English

This Figure shows the V4L2 driver stack (a generic V4L2 driver model of a video pipeline). The video pipeline driver loads the necessary subdevice drivers and registers the device nodes it needs, based on the video pipeline configuration specified in the device tree. The framework exposes the following device node types to user space to control certain aspects of the pipeline:

Media device node: /dev/media*

Video device node: /dev/video*

V4L subdevice node: /dev/v4l-subdev*

Note: The * means [0 . . .n], e.g., /dev/media1 , /dev/media2 , and so on.

These steps describe the data flow within software:

1. The V4L2 source driver allocates frame buffer for the capture device.

2. The V4L2 framework imports/exports the DMA_BUF file descriptor (FD) to the next GStreamer element.

3. The encoder reads the source buffer from the capture device, encodes it, and writes the encoded bitstream to a bitstream buffer. The encoded bitstream does not use DMA_BUF framework for sharing the buffer.

4. The decoder allocates a decoded frame buffer, reads the bitstream buffer, and writes the decoded frame buffer into memory.

5. The decoder shares the decoded frame buffer using the DMA_BUF framework with the DRM display device.

Figure 3-2: V4L2 Driver Stack

X-Ref Target - Figure 3-2

driver_stack.jpg