I2S Audio Pipeline - 2023.1 English

Zynq UltraScale+ MPSoC ZCU106 Video Codec Unit Targeted Reference Design User Guide (UG1250)

Document ID
UG1250
Release Date
2023-05-16
Version
2023.1 English

The I2S Transmitter and Receiver cores are soft AMD IP cores, which make easy to implement inter-IC-sound (I2S) interfaces used to connect audio devices for transmitting and receiving PCM audio. The I2S Transmitter and I2S Receiver cores provide an easy way to interface the I2S based audio DAC/ADC. These IPs require minimal register programming and support any audio sampling rates. For more information refer to the I2S Transmitter and I2S Receiver LogiCORE IP Product Guide (PG308) [Ref 23] .