FMCP Connector J26

ZCU111 Evaluation Board User Guide (UG1271)

Document ID
UG1271
Release Date
2022-10-06
Revision
1.3 English

[This Figure, callout 27]

The HSPC connector J26 implements a subset of the full FMCP connectivity:

68 single-ended or 34 differential user-defined pairs (34 LA pairs: LA[00:33])

12 transceiver differential pairs

3 transceiver differential clocks

2 differential clocks

239 ground and 16 power connections

The FMCP HSPC J26 connections to RFSoC U1 are referenced in Xilinx Design Constraints. See the FPGA Mezzanine Card (FMC) VITA 57.4 specification [Ref 23] for additional information on the FMCP HSPC connector.