User I/O

ZCU111 Evaluation Board User Guide (UG1271)

Document ID
UG1271
Release Date
2022-10-06
Revision
1.3 English

[This Figure, callouts 22-25]

The ZCU111 board provides these user and general purpose I/O capabilities:

Eight user LEDs (callout 22)

°GPIO_LED[7-0]: DS11, DS12, DS13, DS14, DS15, DS16, DS17, DS18

8-position user DIP Switch (callout 23)

°GPIO_DIP_SW[7:0]: SW14

Five user pushbuttons and CPU reset switch (callouts 24 and 25)

°GPIO_SW_[NWCES]: SW9, SW10, SW11, SW12, SW13

°CPU_RESET: SW15

This Figure through This Figure show the GPIO circuits. Table: GPIO Connections to XCZU28DR lists the GPIO connections to XCZU28DR U1 connections.

Figure 3-25:      GPIO LEDs

X-Ref Target - Figure 3-25

X20493-gpio-leds.jpg
Figure 3-26:      GPIO 8-Pole DIP Switch

X-Ref Target - Figure 3-26

X20494-8-pole-dip-sw.jpg

 

Figure 3-27:      GPIO Pushbutton Switches

X-Ref Target - Figure 3-27

X20495-gpio-pb-sw.jpg

 

Table 3-24:      GPIO Connections to XCZU28DR

XCZU28DR (U1) Pin

Net Name

I/O Standard

Device

GPIO LEDs (Active High)(1)

AR13

  GPIO_LED_0

 LVCMOS18  

 DS11.2

AP13

  GPIO_LED_1

 LVCMOS18  

 DS12.2

AR16

  GPIO_LED_2

 LVCMOS18  

 DS13.2

AP16

  GPIO_LED_3

 LVCMOS18  

 DS14.2

AP15

  GPIO_LED_4

 LVCMOS18  

 DS15.2

AN16

  GPIO_LED_5

 LVCMOS18  

 DS16.2

AN17

  GPIO_LED_6

 LVCMOS18  

 DS17.2

AV15

  GPIO_LED_7

 LVCMOS18  

 DS18.2  

GPIO DIP SW (Active High)

AF16

  GPIO_DIP_SW0  

 LVCMOS18  

SW14.8

AF17

  GPIO_DIP_SW1  

 LVCMOS18  

 SW14.7

AH15

  GPIO_DIP_SW2  

 LVCMOS18  

 SW14.6

AH16

  GPIO_DIP_SW3  

 LVCMOS18  

 SW14.5

AH17

  GPIO_DIP_SW4  

 LVCMOS18  

 SW14.4

AG17

  GPIO_DIP_SW5  

 LVCMOS18  

 SW14.3

AJ15

  GPIO_DIP_SW6  

 LVCMOS18  

 SW14.2

AJ16

  GPIO_DIP_SW7  

 LVCMOS18  

 SW14.1  

Directional Pushbuttons (Active High)

AW3

  GPIO_SW_N

 LVCMOS18  

 SW9.3

AW6

  GPIO_SW_W

 LVCMOS18  

 SW10.3

AW5

  GPIO_SW_C

 LVCMOS18  

 SW11.3

AW4

 GPIO_SW_E

 LVCMOS18  

 SW12.3

E8

  GPIO_SW_S

 LVCMOS18  

 SW13.3  

CPU Reset Pushbutton (Active High)

AF15

 CPU_RESET

 LVCMOS18

 SW15.3  

Notes:

1.Level-shifted net names at ZU28DR U1 have _LS appended.