XM500 ADC/DAC Data and Clock SMA

ZCU111 Evaluation Board User Guide (UG1271)

Document ID
UG1271
Release Date
2022-10-06
Revision
1.3 English

This section provides details on the XM500 ADC/DAC data and clock SMA, and I/O 2x10 header connectors to the ZCU111 board U1 RFSoC ZCU28DR channel mapping. Table: XM500 ADC/DAC Data and Clock Mapping provides the XM500 ADC/DAC data and clock mapping.

Table D-2:      XM500 ADC/DAC Data and Clock Mapping

SMA Ref. Des.

ADC/DAC Data or Clock

J26(P)/J27(N)

DAC228_T0_Ch0

J20(P)/J21(N)

DAC228_T0_Ch1

J22(P)/J23(N)

DAC228_T0_Ch2

J24(P)/J25(N)

DAC228_T0_Ch3

J7

DAC229_T1_Ch0

J8

DAC229_T1_Ch1

J5

DAC229_T1_Ch2

J6

DAC229_T1_Ch3

J4

ADC224_T0_Ch0

J3

ADC224_T0_Ch1

J2

ADC225_T1_Ch0

J1

ADC225_T1_Ch1

J33(P)/J32(N)

ADC226_T2_Ch0

J34(P)/J35(N)

ADC226_T2_Ch1

J37(P)/J36(N)

ADC227_T3_Ch0

J39(P)/J40(N)

ADC227_T3_Ch1

J30(P)/J31(N)

ADC224_T0_CLKIN

J889(P)/J890(N)

ADC225_T1_CLKIN

J891(P)/J892(N)

ADC226_T2_CLKIN

J893(P)/J894(N)

ADC227_T3_CLKIN

J28(P)/J29(N)

DAC228_T0_CLKIN

J896(P)/J895(N)

DAC229_T1_CLKIN

J898(P)/J897(N)

DAC230_T2_CLKIN

J900(P)/J899(N)

DAC231_T3_CLKIN

J9 2x10 header

See This Figure

J10 2x10 header

See This Figure

 

This Figure shows the XM500 2x10 header connector J10 ADCIO and J9 DACIO to the ZCU111 board U1 RFSoC ZC28DR bank 84 and 87 mapping.

Figure D-5:      XM500 J10, J9 2x10 Header to ZCU111 Board U1 RFSoC ZCU28DR
ADC/DAC Banks 84, 87 Connectivity

X-Ref Target - Figure D-5

X21087-bank-84-87.jpg

Table: ZCU111 U1 RFSoC RF Bank 224-229 Connections to XM500 and Table: ZCU111 U1 RFSoC Bank 84 ADCIO and Bank 87 DACIO Connections to XM500 show end-to-end ZCU111 U1 RFSoC pin number to LPAF/M connector pin number to XM500 connectors pin number.

Table D-3:      ZCU111 U1 RFSoC RF Bank 224-229 Connections to XM500

ZCU111 Board (with LPAF)

Mated Conns

XM500 RFMC Card (with LPAM)

ZU28DR U1 Bank

ZU28DR U1 Pin Name

ZU28DR U1 Pin

ZCU111 Net Name

ZCU111 LPAF

LPAF/
M Pin

XM500 LPAM

SE-to-Diff Element

XM500 SMA Ref Des

 

224

 ADC_VIN_I01_P_224_AP2

AP2

RFMC_ADC_00_P

J47

G9

J333

U9 Mini-Circuits Xfmr 0-1 GHz

J4

 ADC_VIN_I01_N_224_AP1

AP1

 RFMC_ADC_00_N

F9

 VCM01_224_AL5

 AL5

VCM01_224(1)

A21

 

NC

 ADC_VIN_I23_P_224_AM2

 AM2

 RFMC_ADC_01_P

C10

U8 Mini-Circuits Xfmr 0-1 GHz

J3

 ADC_VIN_I23_N_224_AM1

 AM1

 RFMC_ADC_01_N

B10

 VCM23_224_AL4

 AL4

VCM23_224(1)

B21

 

NC

 

225

 ADC_VIN_I01_P_225_AK2

 AK2

 RFMC_ADC_02_P

J47

G12

J333

   U7 Anaren Balun 1-4 GHz

J2

 ADC_VIN_I01_N_225_AK1

 AK1

 RFMC_ADC_02_N

F12

 VCM01_225_AK5

 AK5

VCM01_225(1)

C21

 

NC

 ADC_VIN_I23_P_225_AH2

 AH2

 RFMC_ADC_03_P

C13

    U6 Anaren Balun 1-4 GHz

J1

 ADC_VIN_I23_N_225_AH1

 AH1

 RFMC_ADC_03_N

B13

 VCM23_225_AK4

 AK4

VCM23_225(1)

D21

 

NC

 

226

 ADC_VIN_I01_P_226_AF2

 AF2

 RFMC_ADC_04_P

J47

G15

J333

None, Direct

J33

 ADC_VIN_I01_N_226_AF1

 AF1

 RFMC_ADC_04_N

F15

J32

 VCM01_226_AJ5

 AJ5

VCM01_226(1)

E21

 

NC

 ADC_VIN_I23_P_226_AD2

 AD2

 RFMC_ADC_05_P

C16

None, Direct

J34

 ADC_VIN_I23_N_226_AD1

 AD1

 RFMC_ADC_05_N

B16

J35

 VCM23_226_AJ4

 AJ4

VCM23_226(1)

F21

 

NC

 

227

 ADC_VIN_I01_P_227_AB2

 AB2

 RFMC_ADC_06_P

J47

G18

J333

None, Direct

J37

 ADC_VIN_I01_N_227_AB1

 AB1

 RFMC_ADC_06_N

F18

J36

 VCM01_227_AH5

 AH5

VCM01_227(1)

G21

 

NC

 ADC_VIN_I23_P_227_Y2

 Y2

 RFMC_ADC_07_P

C19

None, Direct

J39

 ADC_VIN_I23_N_227_Y1

 Y1

 RFMC_ADC_07_N

B19

J40

 VCM23_227_AH4

 AH4

VCM23_227(1)

H21

 

NC

Notes:

1.While the ZCU111 board RFSoC bank 224-227 VCM nets are wired to the LPAF J47 connector, the RFMC XM500 plug-in board mating LPAM J333 connector does not break out these nets.

228

 DAC_VOUT0_P_228_U2

 U2

RFMC_DAC_00_P

J94

C10

J888

None, Direct

J26

 DAC_VOUT0_N_228_U1

 U1

RFMC_DAC_00_N

B10

J27

 DAC_VOUT1_P_228_R2

 R2

RFMC_DAC_01_P

G11

None, Direct

J20

 DAC_VOUT1_N_228_R1

 R1

RFMC_DAC_01_N

F11

J21

 DAC_VOUT2_P_228_N2

 N2

RFMC_DAC_02_P

C13

None, Direct

J22

 DAC_VOUT2_N_228_N1

 N1

RFMC_DAC_02_N

B13

J23

 DAC_VOUT3_P_228_L2

 L2

RFMC_DAC_03_P

G14

None, Direct

J24

 DAC_VOUT3_N_228_L1

 L1

RFMC_DAC_03_N

F14

J25

 

229

 DAC_VOUT0_P_229_J2

 J2

 RFMC_DAC_04_P

J94

C16

J888

   U3 Anaren Balun 1-4 GHz

J7

 DAC_VOUT0_N_229_J1

 J1

 RFMC_DAC_04_N

B16

 DAC_VOUT1_P_229_G2

 G2

 RFMC_DAC_05_P

G17

   U1 Anaren Balun 1-4 GHz

J8

 DAC_VOUT1_N_229_G1

 G1

 RFMC_DAC_05_N

F17

 DAC_VOUT2_P_229_E2

 E2

 RFMC_DAC_06_P

C19

U5 Mini-Circuits Xfmr 0-1 GHz

J5

 DAC_VOUT2_N_229_E1

 E1

 RFMC_DAC_06_N

B19

 DAC_VOUT3_P_229_C2

 C2

 RFMC_DAC_07_P

G20

U4 Mini-Circuits Xfmr 0-1 GHz

J6

 DAC_VOUT3_N_229_C1

 C1

 RFMC_DAC_07_N

F20

Table D-4:      ZCU111 U1 RFSoC Bank 84 ADCIO and Bank 87 DACIO Connections to XM500

ZCU111 Board (with LPAF)

Mated Conns

XM500 RFMC Card (with LPAM)

ZU28DR U1 Bank

ZU28DR U1 Pin Name

ZU28DR U1 Pin

ZCU111 Net Name

ZCU111 LPAF

LPAF/M Pin

XM500 LPAM

2x10 Header Pin

XM500 Header

 

84

 IO_L12N_AD0N_84_AP5

 AP5

 ADCIO_00

J47

A2

J333

1

J10 2x10 Male-Pin Header

 IO_L12P_AD0P_84_AP6

 AP6

 ADCIO_01

A4

3

 IO_L11N_AD1N_84_AR6

 AR6

 ADCIO_02

B1

5

 IO_L11P_AD1P_84_AR7

 AR7

 ADCIO_03

B3

7

 IO_L10N_AD2N_84_AV7

 AV7

 ADCIO_04

B5

9

 IO_L10P_AD2P_84_AU7

 AU7

 ADCIO_05

C2

11

 IO_L9N_AD3N_84_AV8

 AV8

 ADCIO_06

C4

13

 IO_L9P_AD3P_84_AU8

 AU8

 ADCIO_07

D1

15

 IO_L8N_HDGC_AD4N_84_AT6

 AT6

 ADCIO_08

D3

17

 IO_L8P_HDGC_AD4P_84_AT7

 AT7

 ADCIO_09

D5

19

 IO_L7N_HDGC_AD5N_84_AU5

 AU5

 ADCIO_10

E2

20

 IO_L7P_HDGC_AD5P_84_AT5

 AT5

 ADCIO_11

E4

18

 IO_L6N_HDGC_AD6N_84_AU3

 AU3

 ADCIO_12

F1

16

 IO_L6P_HDGC_AD6P_84_AU4

 AU4

 ADCIO_13

F3

14

 IO_L5N_HDGC_AD7N_84_AV5

 AV5

 ADCIO_14

F5

12

 IO_L5P_HDGC_AD7P_84_AV6

 AV6

 ADCIO_15

G2

10

 IO_L4N_AD8N_84_AU1

 AU1

 ADCIO_16

G4

8

 IO_L4P_AD8P_84_AU2

 AU2

 ADCIO_17

H1

6

 IO_L3N_AD9N_84_AV2

 AV2

 ADCIO_18

H3

4

 IO_L3P_AD9P_84_AV3

 AV3

 ADCIO_19

H5

2

87

 IO_L12N_AD8N_87_A9

 A9

 DACIO_00

J94

A37

J888

1

J9 2x10 Male-Pin Header

 IO_L12P_AD8P_87_A10

 A10

DACIO_01

A39

3

 IO_L11N_AD9N_87_A6

 A6

DACIO_02

B36

5

 IO_L11P_AD9P_87_A7

 A7

DACIO_03

B38

7

 IO_L10N_AD10N_87_A5

 A5

DACIO_04

B40

9

 IO_L10P_AD10P_87_B5

 B5

DACIO_05

C37

11

 IO_L9N_AD11N_87_C5

 C5

DACIO_06

C39

13

 IO_L9P_AD11P_87_C6

 C6

DACIO_07

D36

15

 IO_L8N_HDGC_87_B9

 B9

DACIO_08

D38

17

 IO_L8P_HDGC_87_B10

 B10

DACIO_09

D40

19

 IO_L7N_HDGC_87_B7

 B7

DACIO_10

E37

20

 IO_L7P_HDGC_87_B8

 B8

DACIO_11

E39

18

 IO_L6N_HDGC_87_D8

 D8

DACIO_12

F36

16

 IO_L6P_HDGC_87_D9

 D9

DACIO_13

F38

14

 IO_L5N_HDGC_87_C7

 C7

DACIO_14

F40

12

 IO_L5P_HDGC_87_C8

 C8

DACIO_15

G37

10

 IO_L4N_AD12N_87_C10

 C10

DACIO_16

G39

8

 IO_L4P_AD12P_87_D10

 D10

DACIO_17

H36

6

 IO_L3N_AD13N_87_D6

 D6

DACIO_18

H38

4

 IO_L3P_AD13P_87_E7

 E7

DACIO_19

H40

2