The Xilinx® boot image layout has multiple files, file types, and supporting headers to parse those files by boot loaders. Bootgen defines multiple attributes for generating the boot images and interprets and generates the boot images, based on what is passed in the files. Because there are multiple commands and attributes available, Bootgen defines a boot image format (BIF) to contain those inputs. A BIF comprises of the following:
- Configuration attributes to create secure/non-secure boot images
- First stage bootloader (FSBL) for Zynq® devices and Zynq® UltraScale+™ MPSoCs
- Platform loader and manager (PLM) for Versal® ACAP
Note: It is recommended to use the same release version of bootloader (FSBL/PLM) and Bootgen together.
- One or more partition images
Along with properties and attributes, Bootgen takes multiple commands to define the behavior while it is creating the boot images. For example, to create a boot image for a qualified FPGA device, a Zynq®-7000 SoC device, Versal® ACAP series, or a Zynq® UltraScale+™ MPSoC device, you should provide the appropriate arch command option to Bootgen. The following appendices list and describe the available options to direct Bootgen behavior.
The format of the boot image conforms to a hybrid mix of hardware and software requirements. The boot header is required by the BootROM loader which loads a single partition, typically the bootloader. The remainder of the boot image is loaded and processed by the bootloader. Bootgen generates a boot image by combining a list of partitions. These partitions can be:
- FSBL or PLM
- Secondary Stage Boot Loader (SSBL) like U-Boot
- Bitstream PL CFrame data, .rcdo, and .rnpi
- Software applications to run on processors
- User data
- Boot image generated by Bootgen. This is useful for appending new partitions
to a boot image generated previously.Note: Do avoid mix and match of tools release and initial PDI artifacts like PLM.elf, PSM.elf PMC/LPD/FPD.cdo from another tools release.