10/100/1000 Mb/s Tri-speed Ethernet PHY

[Figure 1, callout 22]

The VCU128 evaluation board uses the TI PHY device DP83867ISRGZ (U62) for Ethernet communications at 10 Mb/s, 100 Mb/s, or 1000 Mb/s. The board supports SGMII mode only. The PHY connection to a user-provided Ethernet cable is through RJ-45 connector P2, a Wurth 7499111221A with built-in magnetics and status LEDs. On power-up, or on reset, the PHY is configured to operate in SGMII mode with PHY address[4:0] = 00011. The following table lists the FPGA U1 to U62 DP83867ISRGZ Ethernet PHY connections. This table also shows the net names for the connections from the FPGA to the Ethernet PHY. ENET_SGMII_IN correlates with the SGMII_TX ports in the FPGA design, and ENET_SGMII_OUT correlates with the SGMII_RX ports.