The VCU128 board supports two of the five UltraScale+™ FPGA configuration modes:
- Quad SPI flash memory (2 Gb)
- JTAG using:
- USB JTAG configuration port (U8 FT4232HL + USB J2 micro-AB)
- Xilinx Platform Cable USB II, 2 mm, keyed flat cable header (J4)
Each configuration interface corresponds to one or more configuration modes and
bus widths, as listed in the following table. The mode switches M2, M1, and M0 are
on SW1 positions 2, 3, and 4, respectively. The FPGA default mode setting M[2:0] =
001 selects the master SPI configuration mode.
| Configuration Mode | SW1 DIP Switch Settings M[2:0] | Bus Width | CCLK Direction |
|---|---|---|---|
| Master SPI |
1
|
x1, x2, x4 | Output |
| JTAG |
101
|
x1 | NA |
For complete details on configuring the FPGA, see UltraScale Architecture Configuration User Guide (UG570). The following figure shows the configuration mode DIP switch SW1 JTAG switch positions.
Figure 1. SW1 JTAG Mode Settings
