Revision History

RF Data Converter Interface User Guide (UG1309)

Document ID
Release Date
1.4 English

The following table shows the revision history for this document.

Section Revision Summary
10/27/2021 Version 1.4
Introduction Added Zynq UltraScale+ RFSoC DFE device.
Window Menu Options and Window Menu Options Updated MultiView option description and the MultiView RF-ADC Time Domain figure.
RF-DAC Settings Updated Decoder Mode, Inverse Sinc Settings, and Current.
Clock Distribution (Gen 3) and Clock Distribution (Gen 3) Removed Output Divider (M) option and updated Tile Status Based on Clock Distribution figure.
Selecting the Hardware Target and Bitstream Revised hardware target figures.
RF-ADC Settings Added AutoCal (Gen 3 only).
RF-DAC Settings Specified Gen 3 only for Nyquist zone Mix Mode.
System Monitor Added new section.
RF-DAC Data Pattern Revised introductory paragraph to provide additional information on the provided files.
FFT Metrics Revised the dBFS and FspurxH23 metrics.
RF-DAC Data Pattern Added note on DAC vector length.
12/23/2020 Version 1.3
General updates Updated throughout to add Gen 3 information and clarify content for the different devices (Gen 1, 2, and 3). Removed content that is not related to the GUI and is covered in other documentation.
Introduction Added references to ZCU216 documentation. Updated Feature Support table with ZCU208 and ZCU216 information.
Software Installation Added Select Destination figure.
Settings Menu Options Revised Communication Interface figure.
Clock Settings Added clock information for Gen 3 devices.
RF-DAC Output Settings—Gen 1 and 2 Added note and Gen 3 information.
Tile PLL Settings Added note.
Converter Settings Updated Converter Settings figure.
RF-ADC Settings Added Calibration Frozen and Attenuation functions.
RF-DAC Settings Added information for Gen 3.
Clock Distribution (Gen 3) Added new section.
Interrupts Added new section.
FIFO Data Added new section.
Selecting the Hardware Target and Bitstream Updated the overview figure.
Configuring the Sample Clock Updated configuring the sample clock figures. Removed Sample Clocks Configuration, Generating a Signal, Acquiring a Signal, ZCU111 and ZCU1275 Setup, and Bitstream Generation sections.
RF Analyzer Tool Menu Options Added new section.
RF Analyzer Tool Tabs Added new section.
LVM and TDMS File Format Renamed appendix. Customization and Testing and Loopback Test information removed. FFT Metrics and Appending Files information moved to appendices.
08/16/2019 Version 1.2
Working with the RF Analyzer Added sub-topics to include detail about installation, generation, and acquisition.
12/14/2018 Version 1.1
Introduction Added information about supported features.
File Menu Options Added information about the Bitstream file menu option.
Settings Menu Options Updated information about the Communication and Analysis settings menu options.
RF-DAC Output Settings—Gen 1 and 2 Updated the section and DAC Current Mode screen capture.
Power Advantage Tool—Gen 1, 2, and 3 Added new section.
RF Evaluation Tool Tabs Updated the MemType section and added information about the size limitation in the DDR mode.
FFT Page Added information about Zoom Tools.
RF Analyzer Added new chapter.
Appending Files Added new section.
10/19/2018 Version 1.0
Initial release. N/A