Auto frequency scaling failed because the kernel clock has an original frequency which exceeds the maximum frequency supported by the run time.
The kernel implementation can operate at a higher frequency than the maximum frequency supported by the run time. The compiler will not select a frequency higher than the run time maximum.
If all design parameters are satisfied with this implementation, no further action is required. However, if the design requires too much area on the FPGA, it might be beneficial to change the implementation and trade-off maximum implementation speed with resource requirements.
This design has too much positive slack, which implies that more operations can potentially be scheduled in one cycle without impacting the target clock frequency. You can modify the clock uncertainty used to compile this design. This can generate better resource distribution and influence the final implementation and potentially achieve better resource distributions.