This rule checks the peer to peer (P2P) data transfer between FPGAs.
PCIe® P2P communication is a PCIe feature that enables two PCIe devices to directly transfer data between each other without using host RAM as temporary storage. The latest version of AMD Alveo™ PCIe platforms support P2P features via PCIe Resizeable BAR Capability.
Data can be directly transferred between the DDR/HBM of one Alveo PCIe device and DDR/HBM of a second Alveo PCIe device.
Consider using P2P data transfer between FPGAs. For coding recommendations, refer to https://xilinx.github.io/XRT/master/html/p2p#p2p-data-transfer-between-fpga-card-and-nvme-device.