AXI4 Memory Map I/O Limitations in the Platform - 2021.2 English

Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393)

Document ID
UG1393
ft:locale
English (United States)
Release Date
2021-12-15
Version
2021.2 English

The following shows the AXI4 memory map I/O limitations in the platform:

  • During platform development, AXI4 memory map I/O can be connected to any memory/slave.
  • Master AXI4 memory map I/O cannot connect to kernel as kernel cannot provide an additional slave interface.
  • AXI4 memory map Slave I/O can be used without any restrictions.
  • AXI4 memory map Master I/O can be used where data needs to be driven from external process to memory/slave.