Building the Device Binary - 2023.2 English

Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393)

Document ID
UG1393
Release Date
2023-12-13
Version
2023.2 English

After the C/C++ kernels are compiled into an object (XO) file, and any RTL kernels are packaged as XO files, and the AI Engine graph application is compiled into a libadf.a file, the Vitis v++ --link command links them with the target platform to build the platform file (XSA), or device binary (.xclbin) file as shown in the following figure.

Figure 1. Device Build Process

The process, as outlined above, has two steps:

  1. Compile the design components from the source code.
    • For C, C++ kernels, the v++ -c --mode hls command compiles the source code into object (XO) files. Multiple kernels are compiled into separate XO files.
    • For RTL kernels, the Vivado IP packager command produces the XO file to be used for linking. Refer to Packaging RTL Kernels for more information.
    • Any AI Engine graph application is compiled with the v++ -c --mode aie command to create the libadf.a file.
  2. After compilation, the v++ -l command links one or multiple kernel objects (XO), and the libadf.a file if present, together with the hardware platform, to produce the Xilinx binary .xclbin file or updated .xsa file.

The following sections describe building the different components of the system design to produce the device binary.

Tip: The v++ command can be used from the command line, in scripts, or a build system like make, and can also be used through the Vitis unified IDE as discussed in Using the Vitis Unified IDE.