In the Vitis application acceleration development flow, PL kernels (or compiled Xilinx object (.xo) files) are the processing elements executing in the programmable logic region of the Xilinx device. The Vitis core development kit supports kernels written in C/C++ and compiled in Vitis HLS, or designed in RTL IP and packaged in the Vivado Design Suite. Regardless of source language, all PL kernels have the same properties and must adhere to same set of requirements.
Kernels can be defined as software controllable, or non-software controlled. This means that the kernel is controlled through software such as the host application, or is un-managed by software and is instead data driven.