Streaming Data Transfers - 2023.2 English

Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393)

Document ID
UG1393
Release Date
2023-12-13
Version
2023.2 English

While transferring data from the host typically requires memory mapped interfaces (m_axi) to access global memory, or directly access host memory on some platforms, the AMD Vitis™ core development kit also supports streaming data transfer between kernels. This lets you create kernels that access data from the host system, and then stream it directly to other kernels.

Consider the situation where one kernel is performing some part of the computation, and a second or third kernel completes the operation after receiving the data from the first kernel. With kernel-to-kernel streaming support, data can move directly from one kernel to another without having to transmit back through the global memory. This results in a significant performance improvement. Finally, the data can be passed back to the host application through global memory. An example of this can be found in the Mixed Kernels Design Tutorial with AXI Stream and Vitis on GitHub.