Vitis Binary Container Settings - 2021.2 English

Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393)

Document ID
UG1393
ft:locale
English (United States)
Release Date
2021-12-15
Version
2021.2 English

To edit the settings for a binary container,expand the build target for the hw_link project in the Assistant view, select the binary_container, and click the Settings button (). This displays the Binary Container Settings dialog box as shown in the following figure.

Tip: The options displayed in the Binary Container Settings dialog box depend on the specific build target selected, and will vary between software emulation, hardware emulation, and hardware.
Figure 1. Binary Container Settings

This dialog box lets you specify a new name for the binary container, and to specify link options for the v++ command. Specific options include:

Name
Specify the name of the binary container.
V++ configuration settings
Specify Vitis linker options to be added to the configuration file. Select the Edit command () to edit the options to add to the config file. Specified options will be added to the binary_container-link.cfg file that is linked in the V++ Linker Command Line displayed at the bottom of the dialog box.
V++ command line
Enter link options for the selected binary container to be added to the V++ Linker Command Line displayed at the bottom of the dialog box. For more information on the available options, refer to Vitis Compiler Command.
Compute Units
Specify the number of kernels to add to the device binary as explained in --connectivity Options. The field can be edited, and when you have entered the value, additional kernels will be displayed in the dialog box.
Memory
Specify global memory assignments for each argument of a compute unit as discussed in Mapping Kernel Ports to Memory.
SLR
Define the SLR placement for each compute unit of the kernel as discussed in Assigning Compute Units to SLRs.
ChipScope Debug
Add monitors to capture hardware trace debug information. This specifies the --debug.chipscope option.
Protocol Checker
Add AXI Protocol Checker to your design. This relates to the --debug.protocol option.
Data Transfer
Add performance monitors to capture information related to data transferred between compute unit and global memory. Captured data includes counters, trace, or both. This relates to the --profile.data option, and to xrt.ini file settings as explained in Enabling Profiling in Your Application.
Execute Profiling
Add an accelerator monitor to capture the start and end of compute unit executions. This relates to the --profile.exec option.
Stall Profiling
Add an accelerator monitor with functionality to capture stalls in the flow of data inside a kernel, between two kernels, or between the kernel and external memory. This relates to the --profile.stall option.
V++ Linker Command Line
Displays the current v++ command line with any link options you have specified.
Tip: The settings specified by the Binary Container Settings dialog box are written to a configuration file used by the Vitis compiler with the --config option as described in Vitis Compiler Configuration File. The configuration file is a link; when you place your mouse over the link, it displays the contents of the configuration file.