Introduction to the Methodology Guide - 2021.2 English

Vitis High-Level Synthesis User Guide (UG1399)

Document ID
UG1399
ft:locale
English (United States)
Release Date
2021-12-15
Version
2021.2 English

This Methodology Guide is intended to provide real world design techniques, and details of hardware design which will help you get the most out of the Vitis™ HLS tool. This guide provides details on programming techniques you should apply when writing C/C++ code for high-level synthesis into RTL code, and a checklist of best practices to follow when creating IP that utilize AXI4 interfaces. Finally, it details various optimization techniques to use when working to improve the performance of your code, improving both the fit and function of the resulting hardware.