Un-synchronized I/O in Data-Driven TLP - 2023.2 English

Vitis High-Level Synthesis User Guide (UG1399)

Document ID
UG1399
Release Date
2023-12-18
Version
2023.2 English

Data-driven TLP designs using hls::task run-continuously until reset. These modules support un-synchronized I/O that can change at any time, regardless of whether the module is executing or idle; this is different from control-driven TLP where the input only changes during the idle state. The module designer is not particular about the timing of the change as long as the module can see the updated data at some point in time.

There are two types of un-synchronized I/O:

  • Scalars : where the host periodically checks the status of registers for value change
  • Memory I/O : where the module receives a DRAM buffer from the host code, and privately manages it

The un-synchronized I/O should be marked as stable in the KPN context as shown in the following code example.

void write_process(hls::stream<int>& in,
        hls::stream<int>& out,
        int* mem)
{
#pragma HLS PIPELINE off
    int val;
    static int addr = 0;
 
    in.read(val);
    if (addr >= 32)
        addr = 0;
    //hls::print("writing %d\n", addr);
    mem[addr] = val;
    addr++;
    val = mem[addr-1];
    out.write(val);
}
...
...
...
...
void stable_pointer(int* mem,
        hls::stream<int>& in,
        hls::stream<int>& out)
{
#pragma HLS DATAFLOW
#pragma HLS INTERFACE mode=s_axilite port=mem offset=30
#pragma HLS INTERFACE mode=m_axi bundle=gmem depth=256 max_read_burst_length=16 \
max_widen_bitwidth=512 max_write_burst_length=16 num_read_outstanding=16 \
num_write_outstanding=16 port=mem
#pragma HLS stable variable=mem
 
 
    hls_thread_local hls::stream<int> int_fifo("int_fifo");
#pragma HLS STREAM depth=512 type=fifo variable=int_fifo
    hls_thread_local hls::stream<int> int_fifo2("int_fifo2");
#pragma HLS STREAM depth=512 type=fifo variable=int_fifo2
 
 
    hls_thread_local hls::task t1(process_23, in, int_fifo);
    hls_thread_local hls::task t2(process_11, int_fifo, int_fifo2);
    hls_thread_local hls::task t3(write_process, int_fifo2, out, mem);
 
}

For both C/RTL Co-simulation the un-synchronized access needs to be enabled for hls::task and M_AXI interfaces via the cosim.enable_tasks_with_m_axi command as described in Co-Simulation Configuration.