csim_design - 2021.2 English

Vitis High-Level Synthesis User Guide (UG1399)

Document ID
English (United States)
Release Date
2021.2 English


Compiles and runs pre-synthesis C/C++ simulation using the provided C/C++ test bench.

Tip: To specify the files for the test bench run the following command:
add_files -tb

The simulation results are written to the csim folder inside the active solution.


csim_design [OPTIONS]


Enables optimized compilation of the C/C++ test bench. This increases compilation time, but results in better runtime performance.
-argv <string>
Specifies the argument list for the behavioral test bench. The <string> is passed onto the main() C/C++ function of the test bench.
Enables a clean build. Without this option, csim_design compiles incrementally.
-ldflags <string>
Specifies the options passed to the linker for simulation. This option is typically used to pass include path information or library information for the C/C++ test bench.
-mflags <string>
Specifies options required for simulation.
Enable the creation of the Pre-Synthesis Control Flow.
When this option is specified, the simulation binary will be created in the csim directory of the active solution, but simulation will not be executed. Simulation can be launched later from the compiled executable.


Compiles and runs C/C++ simulation:


Compiles source design and test bench to generate the simulation binary. Does not execute the simulation binary:

csim_design -O -setup
Tip: To run the simulation, execute run.sh in a command terminal, from the csim/build directory of the active solution.