csynth_design - 2021.2 English

Vitis High-Level Synthesis User Guide (UG1399)

Document ID
UG1399
ft:locale
English (United States)
Release Date
2021-12-15
Version
2021.2 English

Description

Synthesizes the Vitis HLS project for the active solution.

The command can be executed only in the context of an active solution. The elaborated design in the database is scheduled and mapped onto RTL, based on any constraints that are set.

Syntax

csynth_design [OPTIONS]

Options

-dump_cfg
Write a pre-synthesis control flow graph (CFG).
-dump_post_cfg
Write a post-synthesis control flow graph (CFG).
-synthesis_check
Runs a pre-synthesis design rule check, but does not generate RTL.

Examples

Runs Vitis HLS synthesis on the top-level design.

csynth_design