Sometimes C/C++ code is written with a sequence of operations, resulting in a long chain of operations in RTL. With a small clock period, this can increase the latency in the design. By default, the Vitis HLS tool rearranges the operations using associative and commutative properties. As described in Optimizing Logic Expressions, this rearrangement creates a balanced tree that can shorten the chain, potentially reducing latency in the design at the cost of extra hardware.
Expression balancing rearranges operators to construct a balanced tree and reduce latency.
- For integer operations expression balancing is on by default but may be disabled.
- For floating-point operations, expression balancing is off by default but may be enabled.
command allows this expression balancing to be turned off, or on, within a specified
set_directive_expression_balance [OPTIONS] <location>
<location>is the location (in the format
function[/label]) where expression balancing should be disabled, or enabled.
- Turns off expression balancing at the specified location.
- Specifying the
set_directive_expression_balancecommand enables expression balancing in the specified scope. Adding the -off option disables it.
Disables expression balancing within function
set_directive_expression_balance -off My_Func
Explicitly enables expression balancing in function