set_directive_reset - 2021.2 English

Vitis High-Level Synthesis User Guide (UG1399)

Document ID
UG1399
ft:locale
English (United States)
Release Date
2021-12-15
Version
2021.2 English

Description

Adds or removes resets for specific state variables (global or static). The reset port is used to restore the registers and block RAM, connected to the port, to an initial value any time the reset signal is applied. The presence and behavior of the RTL reset port is controlled using the config_rtl settings.

Greater control over reset is provided through the RESET pragma. If a variable is a static or global, the RESET pragma is used to explicitly add a reset, or the variable can be removed from the reset by turning off the pragma. This can be particularly useful when static or global arrays are present in the design.

Syntax

set_directive_reset [OPTIONS] <location> <variable>
  • <location> is the location (in the format function[/label]) at which the variable is defined.
  • <variable> is the variable to which the directive is applied.

Options

-off
  • If -off is specified, reset is not generated for the specified variable.

Examples

Adds reset to variable a in function foo even when the global reset setting is none or control.

set_directive_reset foo a

Removes reset from variable static int a in function foo even when the global reset setting is state or all.

set_directive_reset -off foo a