Workspace Structure in the Vitis Software Platform - 2021.2 English

Vitis Unified Software Platform Documentation: Embedded Software Development (UG1400)

Document ID
English (United States)
Release Date
2021.2 English

There are two project types in Vitis workspace:

Figure 1. Vitis Software Platform Project Types
When you open the Vitis software platform, you create a workspace. A workspace is a directory location used by the Vitis software platform to store project data and metadata. An initial workspace location must be provided when the Vitis software platform is launched.
XSAs are exported from the Vivado Design Suite. It has the hardware specifications like processor configuration properties, peripheral connection information, address map, and device initialization code. You have to provide the XSA when creating a platform project.
The target platform or platform is a combination of hardware components (XSA) and software components (domains/BSPs, boot components such as FSBL, and so on). Platforms in the repository are not editable. Platforms in the workspace are editable, and are referred to as platform projects.
Platform Project
A platform project provides hardware information and a software runtime environment. It is customizable; you can add domains and modify domain settings. A platform project can be created by importing an XSA, or by importing an existing platform. Several system projects can be built on the same platform project so that hardware and software environment settings can be shared.
A domain is a board support package (BSP) or the operating system (OS) with a collection of software drivers on which to build your application. The created software image contains only the portions of the Xilinx library you use in your embedded design. You can create multiple applications to run on the domain. A domain is tied to a single processor or a cluster of isomorphic processors (for example: A53_0 or A53) in the platform.
System Project
A system project groups together applications that run simultaneously on a device. Two standalone applications for the same processor cannot sit together in a system project. Two Linux applications can sit together in a system project. A workspace can contain multiple system projects.
Application (Software Project)
A software project contains one or more source files, along with the necessary header files, to allow compilation and generation of a binary output (ELF) file. A system project can contain multiple application projects. Each software project must have a corresponding domain.
The Vitis platform has different configurations to support different use cases, outlined as follows:
This platform supports embedded software development for Arm® processors and MicroBlaze™ processors.
Embedded Acceleration
Besides embedded software development, application acceleration is also supported on this type of platform. The platform provides clocks, bus interfaces, and interrupt controllers for the acceleration kernel to use.
Data Center Acceleration
Acceleration kernels and x86 host applications can be developed on this platform. The kernel is controlled using a PCIe® bus.

The following is an example of a typical Vitis software development workspace for Zynq UltraScale+ MPSoC.

Figure 2. Vitis Software Development Workspace Example for Zynq UltraScale+ MPSoC
  • Linux domains can be created for Arm® Cortex®-A53 SMP clusters. Linux applications can be compiled and linked against the libraries provided by the sysroot of the Linux domain.
  • Arm Cortex-A53 core 0 and Arm Cortex®-R5F core 0 can run hello world application at the same time, these two applications can be grouped into one system project.
  • The bare metal build-in-self-test application on Arm Cortex-A53 core 0 can work in its own system project and have its own BSP settings.
  • These system projects run at a different time on the Zynq UltraScale+ MPSoC device. Applications in one system project run at the same time.
  • Boot components such as FSBL and PMU firmware can be created in platform projects automatically. Boot components have their own BSP settings.