loadhw - 2021.2 English

Vitis Unified Software Platform Documentation: Embedded Software Development (UG1400)

Document ID
UG1400
ft:locale
English (United States)
Release Date
2021-12-15
Version
2021.2 English

Load a Vivado HW design.

Syntax

loadhw [options]

Load a Vivado HW design, and set the memory map for the current target. If the current target is a parent for a group of processors, memory map is set for all its child processors. If current target is a processor, memory map is set for all the child processors of its parent. This command returns the HW design object.

Options

Option Description
-hw HW design file.
-list Return a list of open designs for the targets.
-mem-ranges [list {start1 end1} {start2 end2}] List of memory ranges from which the memory map should be set. Memory map is not set for the addresses outside these ranges. If this option is not specified, then memory map is set for all the addresses in the hardware design.

Returns

Design object, if the HW design is loaded and memory map is set successfully. Error string, if the HW design cannot be opened.

Example(s)

targets -filter {name =~ "APU"}; loadhw design.xsa 
Load the HW design named design.hdf and set memory map for all the child processors of APU target.
targets -filter {name =~ "xc7z045"}; loadhw design.xsa
Load the HW design named design.hdf and set memory map for all the child processors for which xc7z045 is the parent.