reserve - 2021.2 English

Vitis Unified Software Platform Documentation: Embedded Software Development (UG1400)

Document ID
UG1400
ft:locale
English (United States)
Release Date
2021-12-15
Version
2021.2 English

Syntax

  • For Zynq devices and Zynq UltraScale+ MPSoC:
    [reserve = <value>] <filename>
  • For Versal® ACAP:
    { reserve = <value>, file=<filename> }

Description

Reserves the memory and padded after the partition. The value specified for reserving the memory is in bytes.

Arguments

Specified partition

Example

  • For Zynq devices and Zynq UltraScale+ MPSoC:
    all:                                                
    {                                                   
         [bootloader] fsbl.elf                          
         [reserve=0x1000] test.bin                      
    }
  • For Versal® ACAP:
    new_bif:
    {
    	image
    	{
    		{ type = bootimage, file = base.pdi }
    	}
    	image
    	{
    		name = apu_ss, id = 0x1c000000
    		{ reserve = 0x1000, file = data.bin }
    	}
    }
    
Note: *base.pdi is the PDI generated by Vivado.