[Figure 1, callout 1]
The VMK180 board XPIO triplet 1 (banks 700/701/702) memory interface supports 288-pin 72-bit (64-bit, and 8-bit ECC) DDR4 DIMM socket J45.
The VMK180 board is shipped with a DDR4 UDIMM installed:
- Manufacturer: Micron
- Part number: MTA9ADF1G72AZ-3G2E1
- Description
- 8 GB 288-pin DDR UDIMM
- Single rank
- 8 Gb (1 Gig x 8), 16 banks
- Supports up to 3200 Mbps
The VMK180 XCVM1802 device DDR interface performance is documented in the Versal Prime Series Data Sheet: DC and AC Switching Characteristics (DS956). The VMK180 DDR4 DIMM interface adheres to the constraints guidelines documented in the PCB guidelines for DDR4 section of the Versal Adaptive SoC PCB Design User Guide (UG863). The DDR4 DIMM interface is a 40Ω impedance implementation. Other memory interface details are also available in the Versal Adaptive SoC Memory Resources Architecture Manual (AM007). For more details, see the Micron MTA9ADF1G72AZ-3GE1 data sheet at the Micron website. The adaptive SoC connections for the feature described in this section are documented in the VMK180 board XDC file, referenced in Xilinx Design Constraints.