[Figure 1, callout 8]
This is the primary Versal adaptive SoC PS-side UART interface. The VMK180 USB Type-C connector J207 only supports USB2.0.
MIO42 (RX_IN) and MIO43 (TX_OUT) are connected to FTDI FT4232HL U20 USB-to-Quad-UART bridge port BD through TI SN74AVC4T245 level-shifters U18 and U21. The FT4232HL U20 port assignments are listed in the following table.
| FT4232HL U34 | Versal Device U1 |
|---|---|
| Port AD JTAG | VMK180 JTAG chain |
| Port BD UART0 | PS_UART0 (MIO 18-19) |
| Port CD UART1 | PL_UART1 bank 306 |
| Port DD UART2 | U20 system controller UART |
The FT4232HL UART interface connections are shown in the following figure.
Figure 1. FT4232HL UART Connections
For more information on the FT4232HL, see the Future Technology Devices International Ltd website.
The detailed Versal adaptive SoC connections for the feature described in this section are documented in the VMK180 board XDC file, referenced in Xilinx Design Constraints.