[Figure 1, callout 14]
The following figure shows the QSFP module connector circuitry implementation.
Figure 1. QSFP Module Connector
The QSFP connector 3.3V control nets are wired to the Versal adaptive SoC U1 bank 406.
The QSFP connector I2C interface is connected to the I2C bus via the TCA9548 I2C multiplexer U214 (see PMC MIO[44:45] I2C1 Bus for more details).
The detailed Versal adaptive SoC connections for the feature described in this section are documented in the VMK180 board XDC file, referenced in Xilinx Design Constraints.