The control interfaces and processing system (CIPS in the Versal ACAP device contains high-performance Arm Cortex-A72 processors. On-chip and cache memory is included along with a suite of hardened communication peripherals.
A Cortex-A72 device is employed and is given access to 2 GBytes of DDR RAM. This 2 Gbytes of address space is intended solely for the use of the Cortex-A72. Embedded Linux is run on the Cortex-A72, and runs an application to offload the filtering part using XRT by performing scheduling of customer accelerator functions and monitoring for accelerator function completion.
Of the provided PS peripherals, the peripherals required for the accelerator card are as follows:
- JTAG/UART: for connection to the Vivado® lab tools (e.g., for bitstream download and debug) and to the on-card satellite controller
- I2C: for connection to board peripherals, such as the onboard fan and programmable clock sources