Versal™ ACAP devices are designed around a network on chip (NoC) interconnect, which provides high-bandwidth communication between different areas of the device. In the base platform, the NoC is used for the following:
- Connects the CPM module to DDR memory, allowing the host server to have DMA to the DDR memory controllers.
- Allows the Arm® -A72 processor within the processor subsystem (PS) to connect to the DDR memory.
- Allows the platform management controller (PMC) to communicate to or from the PCIe and the DDR memory.
- Allows all the CPM and PS Cortex-A72 masters to access the programmable logic (PL) peripherals.
- Exposes the platform interfaces to connect the accelerator to the base platform, which allows the accelerators to access the DDR memory.