Programmable Logic Infrastructure - 2020.2 English

Versal ACAP VMK180 Targeted Reference Design (UG1432)

Document ID
UG1432
Release Date
2021-01-08
Version
2020.2 English

The PL logic is shown to stem from the NoC instance as shown in Figure 1. From these NoC connections, the PL peripherals are either directly connected or connected via the intermediate SmartConnect.