Interface Pragma Options - 2023.2 English

Description

This message reports incorrect interface latency or depth option use.

Explanation

HLS interface pragma has bundle option which tells the compiler to either create a port for each unique bundle name or use a single maxi adapter for all arguments specified with the same bundle name.

In the following code sample, the function arguments, pixel, and out are mapped to the same MAXI.

void cnn( int *pixel, // Input pixel
  int *weights, // Input Weight Matrix
  int *out, // Output pixel
  ... // Other input or Output ports
            
#pragma HLS INTERFACE m_axi port=pixel offset=slave bundle=gmem
#pragma HLS INTERFACE m_axi port=weights offset=slave bundle=gmem1
#pragma HLS INTERFACE m_axi port=out offset=slave bundle=gmem

The compiler expects kernel arguments mapped to the same bundle to have the same interface options such as latency, depth, and max_outstanding_request. If different, the compiler will ignore the user-specified and resort to the default interface settings.

The following is an example where the kernel arguments "pixel" and "out" have different interface options.

void cnn( int *pixel, // Input pixel
  int *weights, // Input Weight Matrix
  int *out, // Output pixel
  ... // Other input or Output ports
            
#pragma HLS INTERFACE m_axi port=pixel offset=slave bundle=gmem latency = 8
#pragma HLS INTERFACE m_axi port=weights offset=slave bundle=gmem1
#pragma HLS INTERFACE m_axi port=out offset=slave bundle=gmem latency = 3

Solution

The compiler expects all kernel arguments mapped to the same bundle to have the same interface options as shown below. Either use the same interface options or map the kernel arguments to different bundles.

void cnn( int *pixel, // Input pixel
  int *weights, // Input Weight Matrix
  int *out, // Output pixel
  ... // Other input or Output ports
            
#pragma HLS INTERFACE m_axi port=pixel offset=slave bundle=gmem latency = 8
#pragma HLS INTERFACE m_axi port=weights offset=slave bundle=gmem1
#pragma HLS INTERFACE m_axi port=out offset=slave bundle=gmem latency = 8