The Xilinx® LogiCORE™ IP I2S Transmitter and LogiCORE Receiver cores are soft Xilinx IP cores for use with the Xilinx Vivado® Design Suite, which makes it easy to implement the inter-IC sound (I2S) interface used to connect audio devices for transmitting and receiving PCM audio.
- AXI4-Stream compliant
- Supports up to four I2S channels (up to eight audio channels)
- 16/24-bit data
- Supports master I2S mode
- Configurable FIFO depth
- Supports the AES channel status extraction/insertion
For more information, refer to the I2S Transmitter and Receiver LogiCORE IP Product Guide (PG308).