The Video Scene Change Detection (SCD) IP provides a video processing block that implements the scene change detection algorithm. The IP core calculates a histogram on a vertically subsampled luma frame for consecutive frames. The histograms of these frames are then compared using the sum of absolute differences (SAD). This IP core is programmable through a comprehensive register interface to control the frame size, video format, and subsampling value.
- Input streams can be read from memory mapped AXI4 interface or from AXI4-Stream interface
- Supports up to eight streams in the memory mapped mode and one stream in the stream mode
- Supports Y8 and Y10 formats for memory interface
- Supports RGB, YUV 444, YUV 422, and YUV 420 formats for stream interface
- Supports 8, 10, 12, and 16 bits per color component input and output on AXI4-Stream interface
- Supports one, two, or four-pixel width for stream mode, and one-pixel width for memory mode
- Supports spatial resolutions ranging from 64 × 64 up to 8,192 × 4,320
- Supports 4k 60 fps in all supported device families
- Supports 32-bit and 64-bit DDR memory address access
For more information, see Video Scene Change Detection LogiCORE IP Product Guide (PG322).