The system hardware contains a single PCB assembly. The MNC2 card is built with a XCZU21DR Zynq UltraScale+ RFSoC and a XCZU19EG Zynq UltraScale+ MPSoC. The connectivity includes two 25G interfaces and one x16 Gen 3.0 PCIe interface. Each SoC acts as a Gen3.0 x8 endpoint with respect to root complex. One DDR4 Memory controller is implemented inside the PL section of both SoCs. A second set of DDR4 memory is interfaced to PS section of both SoCs. One 100G transceiver is implemented on both SoCs for inter-SoC communication. A detailed block diagram of the T1 card card is shown in the following figure.
Figure 1. Detailed T1 card Block
Diagram
