Satellite Controller Pin Map

The satellite controller (SC) is responsible for the overall working status of the card. The initial power sequencing, temperature, and alert signals of power supplies and other ICs are monitored and controlled completely by the SC. The SC is implemented using a TI MSP432P microcontroller. The SC is the master of the I2C lines. EEPROM read/write, clock reconfiguration, and the register settings of the power supply IC are accomplished through this interface. The major control signals of the SC are summarized in the pin mappings in the following table.

Table 1. SC Pin Map
Number	Production Net Name	Interface/Description
1	MPSOC_MSP_GPIO1	GPIO: Zynq UltraScale+ MPSoC <-->SC
2	MPSOC_MSP_GPIO2	GPIO: Zynq UltraScale+ MPSoC <-->SC
3	MP_CONFIG_PROG_HS#	Zynq UltraScale+ MPSoC Configuration Program IO
4	SEQ0_PG	POWER SEQUENCE: Power Good Input
5	SEQ1_PG	POWER SEQUENCE: Power Good Input
6	UART_FTDI_TXD_BSL_RXD	UART to Maintenance Port
7	UART_BSL_TXD_FTDI_RXD	UART to Maintenance Port
8	MP_CONFIG_INIT_HS#	Zynq UltraScale+ RFSoC Configuration Init I/O
9	SEQ3_PG	POWER SEQUENCE: Power Good Input
10	VCC_I2C_SDA	PMBUS
11	VCC_I2C_SCL	PMBUS
16	PMBUS_CABLE#	NOT USED
17	SEQ2_PG	POWER SEQUENCE: Power Good Input
18	RF_CONFIG_INIT_HS#	Zynq UltraScale+ RFSoC Configuration Init I/O
19	SFP0_MOD_ABS	SFP: SFP0 Module Absent Input
20	SFP1_MOD_ABS	SFP: SFP1 Module Absent Input
21	MP_RST_REQ_HS	Zynq UltraScale+ MPSoC Reset request Input
22	RF_CONFIG_DONE_HS	Zynq UltraScale+ RFSoC Configuration Done Input
23	MP_CONFIG_DONE_HS	Zynq UltraScale+ MPSoC Configuration Done Input
24	PPS_BUF_SEL	NOT USED (PPS I/O Voltage Select)
25	SEQ3_RUN_2	POWER SEQUENCE: Power Enable Output
26	MP_PS_RST_HS#	Zynq UltraScale+ MPSoC PS SRST Reset
27	MP_PS_POR_HS#	Zynq UltraScale+ MPSoC PS Power-On Reset
32	PMBUS_INT	PMBUS
33	SFP_3V3_SW_FLT#	SFP: Power Switch Fault Indicator Input
34	RFSOC_MSP_GPIO1	GPIO: Zynq UltraScale+ RFSoC <-->SC
35	I2C_SW_INT#	Muxed Interrupt from Temp Sensor and SoCs
36	PCIE_CLK_LOS	PCIe Clock Buffer LOS Input
37	SFP_3V3_SW_PG	SFP: Power Switch Power Good Indicator Input
38	PCIE_PERST#	PCIe Reset Input
39	SENSE_ALERT#	Current Sensor Alert Input
41	RF_CONFIG_PROG_HS#	Zynq UltraScale+ RFSoC Configuration Program IO
48	REV_ADC	Board Rev
49	MSP_ADC_A20	ADC for Board Voltage Sense
50	MSP_ADC_A19	ADC for Board Voltage Sense
51	MSP_ADC_A18	ADC for Board Voltage Sense
52	MSP_ADC_A17	ADC for Board Voltage Sense
53	MSP_ADC_A16	ADC for Board Voltage Sense
54	MSP_ADC_A14	ADC for Board Voltage Sense
55	MSP_ADC_A15	ADC for Board Voltage Sense
56	MSP_ADC_A13	ADC for Board Voltage Sense
57	MSP_ADC_A12	ADC for Board Voltage Sense
58	MSP_ADC_A11	ADC for Board Voltage Sense
59	MSP_ADC_A10	ADC for Board Voltage Sense
60	MSP_ADC_A9	ADC for Board Voltage Sense
61	MSP_ADC_A8	ADC for Board Voltage Sense
62	MSP_ADC_A7	ADC for Board Voltage Sense
63	MSP_ADC_A6	ADC for Board Voltage Sense
64	MSP_ADC_A5	ADC for Board Voltage Sense
65	MSP_ADC_A4	ADC for Board Voltage Sense
66	MSP_ADC_A3	ADC for Board Voltage Sense
67	MSP_ADC_A2	ADC for Board Voltage Sense
68	MSP_ADC_A1	ADC for Board Voltage Sense
69	MSP_ADC_A0	ADC for Board Voltage Sense
75	RFSOC_MSP_GPIO2	GPIO: Zynq UltraScale+ RFSoC <-->SC
76	RF_RST_REQ_HS	Zynq UltraScale+ RFSoC Reset Request Input
77	VCC_ALERT#	PMBUS
78	MSP_I2C2_I2C_SDA	I2C Bus Peripheral
79	MSP_I2C2_I2C_SCL	I2C Bus Peripheral
80	PCIE_I2C_SDA	PCIe SMBUS to Host
81	PCIE_I2C_SCL	PCIe SMBUS to Host
83	MSP_RST#_R	Power-on SC Reset Input
88	MP_CPU_RST_HS#	Zynq UltraScale+ MPSoC User Reset Output
89	RF_PS_RST_HS#	Zynq UltraScale+ RFSoC PS SRST Reset
90	RF_CPU_RST_HS#	Zynq UltraScale+ RFSoC User Reset Output
91	RF_PS_POR_HS#	Zynq UltraScale+ RFSoC PS Power-On Reset
96	SEQ1_RUN	POWER SEQUENCE: Power Enable Output
97	SEQ3_RUN_1	POWER SEQUENCE: Power Enable Output
98	SEQ2_RUN	POWER SEQUENCE: Power Enable Output
99	SEQ0_RUN	POWER SEQUENCE: Power Enable Output
100	STATUS_LED	POWER SEQUENCE: Board Power Good