DDR4 PL Interface Pins

T2 Telco Accelerator Card User Guide (UG1496)

Document ID
Release Date
1.0 English

The following table summarizes the ZU48DR DDR4 PL interface pin map.

Table 1. DDR4 PL Interface Pin Map
Pin Number Signal Name Description I/O
G12 RF_CLK_DDR_N DDR4 Diff Clock Input (N) I
G13 RF_CLK_DDR_P DDR4 Diff Clock Input (P) I
G9 PL_DDR4_1_A0 DDR4 Address 0 O
G6 PL_DDR4_1_A1 DDR4 Address 1 O
J8 PL_DDR4_1_A2 DDR4 Address 2 O
H7 PL_DDR4_1_A3 DDR4 Address 3 O
F9 PL_DDR4_1_A4 DDR4 Address 4 O
K9 PL_DDR4_1_A5 DDR4 Address 5 O
G7 PL_DDR4_1_A6 DDR4 Address 6 O
J7 PL_DDR4_1_A7 DDR4 Address 7 O
J9 PL_DDR4_1_A8 DDR4 Address 8 O
H6 PL_DDR4_1_A9 DDR4 Address 9 O
E13 PL_DDR4_1_A10 DDR4 Address 10 O
H12 PL_DDR4_1_A11 DDR4 Address 11 O
E12 PL_DDR4_1_A12 DDR4 Address 12 O
G14 PL_DDR4_1_A13 DDR4 Address 13 O
E14 PL_DDR4_1_BA0 DDR4 Bank Address 0 O
H13 PL_DDR4_1_BA1 DDR4 Bank Address 1 O
F14 PL_DDR4_1_BG0 DDR4 Bank Group 0 O
C12 PL_DDR4_1_DM0# DDR4 Data Mask 0 O
N14 PL_DDR4_1_DM1# DDR4 Data Mask 1 O
J15 PL_DDR4_1_DM2# DDR4 Data Mask 2 O
G17 PL_DDR4_1_DM3# DDR4 Data Mask 3 O
C23 PL_DDR4_1_DM4# DDR4 Data Mask 4 O
D18 PL_DDR4_1_DM5# DDR4 Data Mask 5 O
J23 PL_DDR4_1_DM6# DDR4 Data Mask 6 O
N20 PL_DDR4_1_DM7# DDR4 Data Mask 7 O
F21 PL_DDR4_1_DM8# DDR4 Data Mask 8 O
A14 PL_DDR4_1_DQ0 DDR4 Data I/O 0 Bidirectional
A11 PL_DDR4_1_DQ1 DDR4 Data I/O 1 Bidirectional
B14 PL_DDR4_1_DQ2 DDR4 Data I/O 2 Bidirectional
C13 PL_DDR4_1_DQ3 DDR4 Data I/O 3 Bidirectional
B13 PL_DDR4_1_DQ4 DDR4 Data I/O 4 Bidirectional
D13 PL_DDR4_1_DQ5 DDR4 Data I/O 5 Bidirectional
A15 PL_DDR4_1_DQ6 DDR4 Data I/O 6 Bidirectional
A12 PL_DDR4_1_DQ7 DDR4 Data I/O 7 Bidirectional
N15 PL_DDR4_1_DQ8 DDR4 Data I/O 8 Bidirectional
M13 PL_DDR4_1_DQ9 DDR4 Data I/O 9 Bidirectional
M17 PL_DDR4_1_DQ10 DDR4 Data I/O 10 Bidirectional
L12 PL_DDR4_1_DQ11 DDR4 Data I/O 11 Bidirectional
N17 PL_DDR4_1_DQ12 DDR4 Data I/O 12 Bidirectional
N13 PL_DDR4_1_DQ13 DDR4 Data I/O 13 Bidirectional
M15 PL_DDR4_1_DQ14 DDR4 Data I/O 14 Bidirectional
M12 PL_DDR4_1_DQ15 DDR4 Data I/O 15 Bidirectional
J18 PL_DDR4_1_DQ16 DDR4 Data I/O 16 Bidirectional
J16 PL_DDR4_1_DQ17 DDR4 Data I/O 17 Bidirectional
H17 PL_DDR4_1_DQ18 DDR4 Data I/O 18 Bidirectional
K16 PL_DDR4_1_DQ19 DDR4 Data I/O 19 Bidirectional
J19 PL_DDR4_1_DQ20 DDR4 Data I/O 20 Bidirectional
L17 PL_DDR4_1_DQ21 DDR4 Data I/O 21 Bidirectional
K17 PL_DDR4_1_DQ22 DDR4 Data I/O 22 Bidirectional
H16 PL_DDR4_1_DQ23 DDR4 Data I/O 23 Bidirectional
E18 PL_DDR4_1_DQ24 DDR4 Data I/O 24 Bidirectional
F16 PL_DDR4_1_DQ25 DDR4 Data I/O 25 Bidirectional
G18 PL_DDR4_1_DQ26 DDR4 Data I/O 26 Bidirectional
E16 PL_DDR4_1_DQ27 DDR4 Data I/O 27 Bidirectional
H18 PL_DDR4_1_DQ28 DDR4 Data I/O 28 Bidirectional
G15 PL_DDR4_1_DQ29 DDR4 Data I/O 29 Bidirectional
E17 PL_DDR4_1_DQ30 DDR4 Data I/O 30 Bidirectional
F15 PL_DDR4_1_DQ31 DDR4 Data I/O 31 Bidirectional
C22 PL_DDR4_1_DQ32 DDR4 Data I/O 32 Bidirectional
A21 PL_DDR4_1_DQ33 DDR4 Data I/O 33 Bidirectional
B24 PL_DDR4_1_DQ34 DDR4 Data I/O 34 Bidirectional
C20 PL_DDR4_1_DQ35 DDR4 Data I/O 35 Bidirectional
C21 PL_DDR4_1_DQ36 DDR4 Data I/O 36 Bidirectional
B20 PL_DDR4_1_DQ37 DDR4 Data I/O 37 Bidirectional
A24 PL_DDR4_1_DQ38 DDR4 Data I/O 38 Bidirectional
A20 PL_DDR4_1_DQ39 DDR4 Data I/O 39 Bidirectional
C16 PL_DDR4_1_DQ40 DDR4 Data I/O 40 Bidirectional
C17 PL_DDR4_1_DQ41 DDR4 Data I/O 41 Bidirectional
D16 PL_DDR4_1_DQ42 DDR4 Data I/O 42 Bidirectional
B19 PL_DDR4_1_DQ43 DDR4 Data I/O 43 Bidirectional
D15 PL_DDR4_1_DQ44 DDR4 Data I/O 44 Bidirectional
A19 PL_DDR4_1_DQ45 DDR4 Data I/O 45 Bidirectional
A16 PL_DDR4_1_DQ46 DDR4 Data I/O 46 Bidirectional
A17 PL_DDR4_1_DQ47 DDR4 Data I/O 47 Bidirectional
L24 PL_DDR4_1_DQ48 DDR4 Data I/O 48 Bidirectional
H23 PL_DDR4_1_DQ49 DDR4 Data I/O 49 Bidirectional
J21 PL_DDR4_1_DQ50 DDR4 Data I/O 50 Bidirectional
H22 PL_DDR4_1_DQ51 DDR4 Data I/O 51 Bidirectional
K24 PL_DDR4_1_DQ52 DDR4 Data I/O 52 Bidirectional
G23 PL_DDR4_1_DQ53 DDR4 Data I/O 53 Bidirectional
G22 PL_DDR4_1_DQ54 DDR4 Data I/O 54 Bidirectional
H21 PL_DDR4_1_DQ55 DDR4 Data I/O 55 Bidirectional
L21 PL_DDR4_1_DQ56 DDR4 Data I/O 56 Bidirectional
L20 PL_DDR4_1_DQ57 DDR4 Data I/O 57 Bidirectional
M20 PL_DDR4_1_DQ58 DDR4 Data I/O 58 Bidirectional
M19 PL_DDR4_1_DQ59 DDR4 Data I/O 59 Bidirectional
N19 PL_DDR4_1_DQ60 DDR4 Data I/O 60 Bidirectional
L19 PL_DDR4_1_DQ61 DDR4 Data I/O 61 Bidirectional
L22 PL_DDR4_1_DQ62 DDR4 Data I/O 62 Bidirectional
L23 PL_DDR4_1_DQ63 DDR4 Data I/O 63 Bidirectional
E22 PL_DDR4_1_DQ64 DDR4 Data I/O 64 (ECC) Bidirectional
G20 PL_DDR4_1_DQ65 DDR4 Data I/O 65 (ECC) Bidirectional
E23 PL_DDR4_1_DQ66 DDR4 Data I/O 66 (ECC) Bidirectional
E21 PL_DDR4_1_DQ67 DDR4 Data I/O 67 (ECC) Bidirectional
F24 PL_DDR4_1_DQ68 DDR4 Data I/O 68 (ECC) Bidirectional
F20 PL_DDR4_1_DQ69 DDR4 Data I/O 69 (ECC) Bidirectional
E24 PL_DDR4_1_DQ70 DDR4 Data I/O 70 (ECC) Bidirectional
D21 PL_DDR4_1_DQ71 DDR4 Data I/O 71 (ECC) Bidirectional
C15 PL_DDR4_1_DQS0 DDR4 Data Strobe 0 (P) Bidirectional
B15 PL_DDR4_1_DQS0# DDR4 Data Strobe 0 (N) Bidirectional
L15 PL_DDR4_1_DQS1 DDR4 Data Strobe 1 (P) Bidirectional
L14 PL_DDR4_1_DQS1# DDR4 Data Strobe 1 (N) Bidirectional
K19 PL_DDR4_1_DQS2 DDR4 Data Strobe 2 (P) Bidirectional
K18 PL_DDR4_1_DQS2# DDR4 Data Strobe 2 (N) Bidirectional
G19 PL_DDR4_1_DQS3 DDR4 Data Strobe 3 (P) Bidirectional
F19 PL_DDR4_1_DQS3# DDR4 Data Strobe 3 (N) Bidirectional
B22 PL_DDR4_1_DQS4 DDR4 Data Strobe 4 (P) Bidirectional
A22 PL_DDR4_1_DQS4# DDR4 Data Strobe 4 (N) Bidirectional
B18 PL_DDR4_1_DQS5 DDR4 Data Strobe 5 (P) Bidirectional
B17 PL_DDR4_1_DQS5# DDR4 Data Strobe 5 (N) Bidirectional
J20 PL_DDR4_1_DQS6 DDR4 Data Strobe 6 (P) Bidirectional
H20 PL_DDR4_1_DQS6# DDR4 Data Strobe 6 (N) Bidirectional
K21 PL_DDR4_1_DQS7 DDR4 Data Strobe 7 (P) Bidirectional
K22 PL_DDR4_1_DQS7# DDR4 Data Strobe 7 (N) Bidirectional
D23 PL_DDR4_1_DQS8 DDR4 Data Strobe 8 (P) Bidirectional
D24 PL_DDR4_1_DQS8# DDR4 Data Strobe 8 (N) Bidirectional
K12 PL_DDR4_1_ODT DDR4 On Die Termination O
K10 PL_DDR4_1_PAR DDR4 Parity O
E11 PL_DDR4_1_RAS# DDR4 Row Address Strobe O
F12 PL_DDR4_1_CAS# DDR4 Column Address Strobe O
K11 PL_DDR4_1_ACT# DDR4 Activate O
H8 PL_DDR4_1_CK DDR4 Clock (P) O
G8 PL_DDR4_1_CK# DDR4 Clock (N) O
K13 PL_DDR4_1_CKE DDR4 Clock Enable O
F11 PL_DDR4_1_CS# DDR4 Chip Select O
D14 PL_DDR4_1_WE# DDR4 Write Enable O
J10 PL_DDR4_1_ALERT# DDR4 Alert I
J14 PL_DDR4_1_RST# DDR4 Reset O
J13 PL_DDR4_1_TEN DDR4 Test Enable O