Hardware Overview

T2 Telco Accelerator Card User Guide (UG1496)

Document ID
UG1496
Release Date
2022-06-15
Revision
1.0 English

The following high-level block diagram of the T2 card provides an overview of the hardware features.

Figure 1. T2 Card High-Level Block Diagram

The T2 card hardware features are as follows:

  • Zynq UltraScale+ RFSoC device targeting L1 channel coding
  • NOR flash (2x 256 MB in dual QSPI mode) for ZU48DR Zynq UltraScale+ RFSoC image storage
  • 4 GB of DDR4 programmable logic (PL) memory
  • 2 GB of DDR4 processor system (PS) memory
  • MSP432-based satellite controller (SC) for card monitoring and telemetry
  • PCIe Gen 3 x16 or Gen 4 x8 bifurcated host interface
  • Low profile (HHHL) single slot (111.15 mm x 167.65 mm) form factor with a 60W power envelope
  • DMB II maintenance and debug port for card maintenance and developer support functions
    Note: The proprietary DMB II interface requires a Xilinx ADK dongle.